Cryptographic Engineering Research Group (CERG)

Flexible Open-source workBench fOr Side-channel analysis (FOBOS)

Side-channel analysis attacks pose a grave threat to implementations of cryptographic algorithms. FOBOS, loosely named after the Greek god Phobos (Φóβος), is an "acquisition to analysis" solution which includes all necessary software to control the device under test (attack) (DUT), trigger the oscilloscope, obtain the measurements and analyze them using several power analysis techniques. FOBOS mainly targets FPGAs as DUTs.

Features

Complete solution useful for education.
Rns cryptographic implementations on FPGAs for side-channel analysis and power consumption benchmarking.
DUT support includes Digilent Nexys3 board (Xilinx Spartan6), NewAE CW305 board (Xilinx Artix7-100), and our new FBD-A7 board (Xilinx Artix-7-12).
FOBOS Shield which provides 100 MS/s ADC for SCA measurements and current sense monitors for power consumption measurements. This removes the need for an oscilloscope and enables benchmarking of power and energy consumption of the DUT.
Modular software, allows for easy adaptation for new boards, oscilloscopes.
Extensible by the user to include
- new attack scenarios and
- new attack models.

Highlights

Fast Aquisition

FOBOS 3 has improved DUT communication via Gigabit Ethernetand supports fast OpenADC or USB3 Picoscopes leading to a total speed improvement over FOBOS 2 of 4 times.

Side-Channel Analysis

SCA lets you recover the secret key. FOBOS supports the following methods: SPA, DPA, CPA.

Leakage Assessment

Test Vector Leakage Assessment lets you know if your implementation is leaking any information. FOBOS supports Welch's T-Test.

FOBOS 3 Features

Acquisition

Uses Digilent Pynq-Z1 or TUL Pynq-Z2 as control board.
Tested with Agilent DSO6054A, Picoscope 3000, 5000, 6000 Series.
VHDL wrapper for DUT w/ support for CAESAR and LWC HW APIs.
Control board provides clock to DUT, no external clock generator required.

Analysis

Correlation Power Analysis
Test vector leakage assessment (TVLA) using T-Test.
Example Jupyter Notebooks
Power Consumption measurement

Download FOBOS 3.0.1 Now

GitHub

FOBOS Documentation

read online

Related Publications

E. Ferrufino, L. Beckwith, A. Abdulgadir, and J.-P. Kaps, FOBOS 3: An open-source platform for side-channel analysis and benchmarking, Proceedings of the 2023 Workshop on Attacks and Solutions in Hardware Security, Association for Computing Machinery, Copenhagen, Denmark, pages 5–14, Nov, 2023 [pdf] [Bibtex]
A. Abdulgadir, J.-P. Kaps, and A. Salman, Enhancing information security courses with remotely accessible side-channel analysis setup, Proceedings of the 2022 on Great Lakes Symposium on VLSI, ACM, Irvine, CA, Jun, 2022 [pdf] [Bibtex]
A. Abdulgadir, W. Diehl, and J.-P. Kaps, An open-source platform for evaluation of hardware implementations of lightweight authenticated ciphers, 2019 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2019, Cancun, Mexico, Dec., 2019 [Accepted Version, pdf] [Bibtex]
A. Abdulgadir, W. Diehl, and J.-P. Kaps, An open-source platform for evaluating side-channel countermeasures in hardware implementations of lightweight authenticated ciphers, Lightweight Cryptography Workshop 2019, NIST, pages 12, Nov, 2019 [pdf] [Bibtex]
A. Abdulgadir, W. Diehl, R. Velegalati, and J.-P. Kaps, Flexible, Opensource workBench fOr Side-channel analysis, IEEE Hardware Oriented Security and Trust: Hardware Demo, 2018 [pdf] [Bibtex]
R. Velegalati and J.-P. Kaps, Towards a Flexible, Opensource BOard for Side-channel analysis (FOBOS), June, 2013, Cryptographic architectures embedded in reconfigurable devices, CRYPTARCHI 2013 [pdf] [Bibtex]
R. Velegalati and J.-P. Kaps, Introducing FOBOS: Flexible Open-source BOard for Side-channel analysis, May, 2012, Work in Progress (WiP), Third International Workshop on Constructive Side-Channel Analysis and Secure Design, COSADE 2012 [pdf] [Bibtex]