History of Updates
v1.2 : August 28, 2017
- Removed the incorrect and redundant slide 68: All Use Cases : Relative Area (#ALUTs) in Stratix V (inadvertently left from v1.0).
v1.1 : August 26, 2017
- Added results for the new Unrolled x4 architecture of JAMBU-SIMON (simonjambu96v2),
implemented using four FPGA families (Virtex-6, Virtex-7, Stratix IV, and Stratix V).
- Added results for the aes128otrcv3 variant of AES-OTR,
implemented using two Altera FPGA families (Stratix IV and Stratix V).
- Modified the incorrect statement that aes128otrsv3 = aes128otrcv3 = aes128otrsv2, on page 31.
aes128otrcv3 is a different variant than aes128otrsv3 = aes128otrsv2. It was introduced for the first time,
as the secondary recommended parameter set, in v. 3.5
of the AES-OTR specification, published on June 2, 2017.
- Added results for the twine80n6t4clocv3 variant of CLOC,
implemented using two Altera FPGA families (Stratix IV and Stratix V).
- Added results for the led80n6t4silcv3 and present80n6t4silcv3 variants of SILC,
implemented using two Altera FPGA families (Stratix IV and Stratix V).
- Replaced previous Virtex-7 results for AES-GCM (aes128gcmv1), OCB (aeadaes128ocbtaglen128v1), CLOC (aes128n12t8clocv2),
and Keyak (riverkeyakv2) with the new results generated using the GMU optimization tool, Minerva (to be released for use
by other groups in Sep. 2017). Since the absolute values of all Virtex-7 AES-GCM results changed, the relative
Virtex-7 results for all other ciphers have changed as well (see slides 56-58 for All Use Cases, slides for 78-80
for Use Case 1, slides 99-101 for Use Case 2, and slides 120-122 for Use Case 3).
- Known effects of the introduced changes on rankings and/or relative results:
- Improved positions (or at least relative results) for JAMBU-SIMON (simonjambu96v2) when implemented
using all four investigated FPGA families (Virtex-6, Virtex-7, Stratix IV, and Stratix V).
- Improved positions (or at least relative results) for AES-OTR (aes128otrcv3) when implemented
using two investigated Altera families (Stratix IV and Stratix V).
- Improved relative Area results for the best variants of CLOC (twine80n6t4clocv3) and
SILC (present80n6t4silcv3) in terms of Area, when implemented
using two investigated Altera families (Stratix IV and Stratix V).
v1.0 : Initial release : August 18, 2017